CONFERENCE-AT-A-GLANCE

Saturday, September 28 - Tutorial Workshops

Morning
Workshops
8:00 a.m. - 12:00 p.m.

TW1:
Yield Assurance at 0.13 micron Technology and Below
(Hands-on Tutorial)
Dr. John Ferguson, Mentor Graphics, Inc.

TW2:
Crystal Oscillator Parameter and Design Challenges
Dr.Robert Zeigler, Pletronics Inc.

TW3:
An Introduction to Bluetooth: A Standard for Short Range Wireless Networking
Prof. Dennis Sweeney, VA Tech, Blacksburg, VA

Lunch
12:00 p.m. - 1:00 p.m.

 

 

 

Afternoon Workshops
1:00 p.m. - 5:00 p.m.

TW4:
Advanced High-Performance Microprocessor Design Challenges and Solutions
Dr. Atila Alvandpour and Dr. Sanu Mathew, Intel Corp.

TW5:
Low voltage, current mode analog circuit structures and their applications
Prof. S.S. Jamuar, UPM Serdang, Malaysia

TW6:
Transceiver Architecture and Components for Wireless Communication Systems
Dr. Samuel Martin and Dr. Zhengxiang Ma, Lucent Technologies

Wednesday, September 25

Registration
7:00 a.m. - 5:00 p.m.

 

 

 

Plenary Session
8:30 a.m. - 10:30 p.m.

Opening Remarks:
   P.R. Mukund, General Conference Chair
Technical Program Overview:
   John Chickanosky, Technical Program Chair
Keynote Address:
   Hiro Hashimoto, Senior Vice President, NEC Electron Devices, NEC Corporation,
   and Chairman, NEC Electronics, Inc.
Plenary Presentation:
   Tom Bednar, Senior Technical Staff Member, IBM Microelectronics

Technical Sessions
10:50 a.m. - 12:05 p.m.

Track A
WA2: SOC DSP TECHNIQUES

Track B
WB2: MULTIMEDIA AUDIO

Track C
WC2: MEMORY AND PROCESSORS

Lunch
12:05 p.m. - 1:10 p.m.

 

 

 

Technical Sessions
1:10 p.m. - 2:50 p.m.

3:10 p.m. - 4:25 p.m.

Track A
WA3: SOC PLANNING AND VERIFICATION
WA4: POWER MODELING & MANAGEMENT

Track B
WB3: DATA CONVERTERS

WB4: MULTIMEDIA VIDEO

Track C
WC3: DSP

WC4: 2001 PAPER PRESENTATIONS

Panel Discussion
5:30 p.m. - 7:00 p.m.

“Solving the Validation Crisis”
Moderator: Graham Budd, ARM Limited

Thursday, September 26

Registration
7:30 a.m. - 5:00 p.m.

 

 

Technical Sessions
8:40 a.m. - 10:20 a.m.

10:50 a.m. - 12:05 p.m.

Track A
TA1: SOC MIGRATION; EVALUATION; EXPLORATION
TA2: LOW-POWER CMOS DESIGN I

Track B
TB1: MIXED-SIGNAL DESIGN

TB2: ON-CHIP BUSES

Lunch
12:05 p.m. - 1:10 p.m.

 

 

Technical Sessions
1:10 p.m. - 2:50 p.m.
3:10 p.m. - 4:25 p.m.

Track A
TA3: SOC IMPLEMENTATION I
TA4: SOC IMPLEMENTATION II

Track B
TB3: NETWORKING
TB4: SYSTEM LEVEL LOW-POWER

5:30 p.m. - 7:00 p.m.

POSTER SESSION

 

Conference Banquet
7:00 p.m. - 9:00 p.m.

Banquet Speech:
New Technologies that can Support Human Exploration of Space
Kumar Krishen, Fellow, Society for Design And Process Science (SDPS)

Friday, September 27

Registration
8:00 a.m. - 3:30 p.m.

 

 

Technical Sessions
8:40 a.m. - 10:20 a.m.
10:50 a.m. - 12:05 p.m.

Track A
FA1: LOW-POWER CMOS DESIGN II
FA2: SOC PHYSICAL DESIGN I

Track B
FB1: WIRELESS
FB2: DEEP SUBMICRON TECHNOLOGY

Lunch
12:05 p.m. - 1:10 p.m.

 

 

Technical Sessions
1:10 p.m. - 2:50 p.m.

3:10 p.m. - 4:25 p.m.

Track A
FA3: PHYSICAL LEVEL INTERCONNECTS
FA4: SOC PHYSICAL DESIGN II

Track B
FB3: HIGH PERFORMANCE AND INTERCONNECTS
FB4: REUSABLE, EMBEDDED, CORES/MACROS